MIPS-CPU

Computer engineering goes free and open


The MIPS architecture was originally developed at Stanford University in the early 1980s. It has been the teaching architecture of choice for decades because of what proponents say is its elegant true RISC design, epitomized by Dr. David A. Patterson and Dr. John L. Hennessy in their book, ‘Computer Organization and Design’, now in its fifth edition.

Through MIPSfpga, Imagination is providing universities with a simplified version of its MIPS microAptiv CPU core, which has been configured by an academic specifically for academic use.

Many academics are already familiar with the microAptiv CPU, and it already has a broad ecosystem of support based on its use in numerous commercial products including the PIC32MZ microcontroller (MCU) from Microchip Technology.

The MIPS CPU is being offered as part of a free-to-download package for universities, together with a Getting Started Guide, teaching guide for professors, and examples designed to enable students to see how the CPU works and explore its capabilities. With the materials, students can develop a CPU and take it through debug, running on an FPGA platform.

The MIPSfpga deliverables were developed by Dr. David Harris and Dr. Sarah Harris, professors who co-wrote the popular book, ‘Digital Design and Computer Architecture’, now in its second edition. Dr. David Harris configured the MIPS CPU at the heart of MIPSfpga, and Dr. Sarah Harris developed the teaching materials.

This MIPS CPU configuration is designed to run on a low-cost FPGA platform, with guides available for the Digilent Nexys4 platform with a Xilinx Artix-7 FPGA, and the Terasic DE2 platform with an Altera Cyclone FPGA.

MIPSfpga is already running in several academic institutions including Harvey Mudd College, Imperial College London, University College London (UCL), and the University of Nevada, Las Vegas (UNLV).

Material from a press release was used in this report.

Laura Ascione